The present invention relates to a support of a virtual memory provided in processor, and more particularly to a register recovering system necessary for instruction re-execution.
There is a tendency to attain a virtual memory capability, which has been provided heretofore only for a relatively large computer, even of a microprocessor by virtue of improvements on integration density and performance of the microprocessor.
In a virtual memory system, a virtual address space for the user is divided into certain fixed-sized pages, and the respective pages are mapped into a physical memory. In case a program makes access to a page not present in the physical memory, a page fault occurs to interrupt the processor and initiate an exception processing. In the fault handler routine, the page is fetched from an external storage to substitute it for another page of the physical memory. During this replacement operation, the processor executes a different program. After the replacement operation terminates, the processor resumes the execution of the page-faulted program. To support a virtual memory and virtual machine operations, it is therefore necessary to execute a different program after suspension of the page-faulted program and thereafter resume the execution of the suspended program. The processor must therefore be provided with a function to support such operation.
The methods to realize such a function are mainly divided into two methods: the instruction continuation method and the instruction restart method. The former is adopted in a microprocessor MC68010 manufactured by Motorola Corp., the contents of which is described in "Virtual Memory and the MC68010" IEEE MICRO, Vol. 3, No. 3, June 1983, pp. 24 to 39. With this method, when a page fault is detected during execution of instructions, the execution of the instructions is suspended and the internal state of the processor at that time is saved in stacks. After the exception handler routine solves the page fault, saved information in the stacks is again recovered to the processor to resume execution of the suspended instructions starting from where the instructions were suspended. Disadvantages associated with this method are enumerated in the following two points.
(1) The internal state of the processor depends on its architecture, so that the number of saving stacks differs for each processor. Therefore, even those processors belonging to the same family have no compatibility with each other.
(2) The number of saving stacks tends to become large as the architecture of the processor becomes complicated, thus occupying a larger memory space. In addition, it takes more time to save and recover. There are many processors adopting the instruction restart method because of the above-noted disadvantages of the instruction continuation method of virtual memory support. In the instruction restart method, upon detection of a page fault during execution of instructions, the processor is interrupted and the fault handler routine eliminates the page fault. In this case, the execution of the instructions where the page fault was detected is restarted from the beginning.
The instruction restart method can solves the above disadvantages of the instruction continuation method. However, there is a problem of recovering the contents of user-visible registers. That is, it is necessary to recover the contents of registers before re-execution of the instructions in order that the result of re-execution of the page faulted instructions becomes equal to the result of normal execution of the instructions which would be obtained in case of no page fault.
One method to solve the problem of register recovery is to not alter the contents of registers until a page fault occurs and it becomes impossible to execute the instructions. With this method, although the amount of hardware used for this purpose is small, it is necessary to delay the alteration of the contents of registers for a certain time interval. As a result, the time required for execution of instructions becomes long which deteriorates the processor performance.
According to a second method a copying register is provided for each register. At the start of execution of instructions, the content of each register is copied and saved in each corresponding copying register. If a page fault occurs during execution of instructions, the content of the copying register is restored to the corresponding register. With this method, however, a large amount of hardware is required, which is hard to realize in view of the currently available intergration density of a microprocessor.
According to a third method, if the content of a register is altered by storing therein a word read out based on the effective address obtained through addition of a displacement to the content of the register in execution of one instruction, the name of the altered register and the value of the displacement used for alteration are tagged and saved in a specified control register. The content of the register is reconstructed, before the re-execution, by subtracting the displacement from the effective address. This method, however, must properly be arranged with due regard to the instruction system of the processor, e.g., the timings of saving, the content of save information, or the like. A processor adopting this method is, for example, a 16 bit microprocessor J11 manufactured by Digital Equipment Corp. The problem of register recovery is still unsettled in this method for supporting Move instruction for plural words. In particular, if a page fault occurs while reading plural words from the physical memory and storing them in the respective registers, a problem exists as to how the contents of registers are reconstructed based on the displacement value.